qwenGPU compiles a 4-lane SIMT GPU into Qwen3.5-2B as 45 untrained layers. The model writes every step of real CUDA launches itself, using Gated DeltaNet state as registers and memory
Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA
qwenGPU compiles a 4-lane SIMT GPU into Qwen3.5-2B as 45 untrained layers. The model writes every step of real CUDA launches itself, using Gated DeltaNet state as registers and memory
M
Michal Sutter · via MarkTechPost
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Monday, November 2, 2026
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Original reporting by MarkTechPost
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“Meet qwenGPU: Qwen3.5-2B With 45 Compiled GPU Layers That Run CUDA”
via MarkTechPostPRIMARY SOURCE
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